Technical Field
The present invention relates to semiconductor devices and processing, and more particularly to a staircase fin field effect transistor (finFET) that preserves channel region strain.
Description of the Related Art
A stress memorization technique (SMT) has demonstrated a drive current benefit on planar device structures for n-type field effect transistors (NFETs). In finFET devices however, due to the nature of the three-dimensional geometrical constraint, the implementation of SMT has become even more challenging. The fins tend to be isolated from larger bulk semiconductor materials, and their small size makes it very difficult to sustain strain in the fins.